The present invention relates generally to a semiconductor device which is accommodated to a flat package and a method for manufacturing the same.
A flat package, called a "flatpack", can be used to encapsulate an LSI (i.e., Large Scale Integrated circuit) chip which has a large number of contact pads. Therefore, the semiconductor device has high density leads, which come out of the sides of the package and are arranged in a plane which is the same as that of the package or parallel with that of the package.
The prior art semiconductor device comprises an LSI chip and a package for accommodating the LSI chip having a large number of contact pads. In order to manufacture such a semiconductor device, a carrier which is already provided with a lead pattern is prepared. Next, lead frames which have leads and a supporting end portion for supporting the leads are brazed to each side of the lead pattern of the carrier. Generally, the leads within one lead frame are elongated and parallel with each other. Then, an LSI chip is bonded to a die bond area of the carrier. After that, the inner leads are bonded to contact pads of the LSI chip by wires, which is a so-called wire bonding. After the wire bonding operation has been completed, a cover is placed on the carrier so that the space in which the LSI chip is located is hermetically enclosed.
In order to test such a semiconductor device whose leads are located at closely spaced points, the ends of the lead frames are clipped off and, after that, the leads of the semiconductor device are brazed to a printed circuit board for testing. The printed circuit board has probe pads at widely spaced points so that probes are easy to mount on the board. After testing, the leads of the semiconductor device are separated from the printed circuit board.
However, in the above-mentioned prior art, the cost for manufacturing a semiconductor device is high, since processes for brazing and separating leads of the semiconductor device on a printed circuit board are required, which is high in cost. In addition, defective devices, such as those with bent leads, are often generated during the brazing and separating processes, so that it is necessary to repair the defective leads. Furthermore, in the electrical testing of the semiconductor device, signal measurement is very slow, since the printed pattern wires of the printed circuit board are relatively long.